AMD Pivots Versal Premium Gen 2 from HBM to LPDDR5X Memory-on-Package Citing Supply Constraints
Tags Infrastructure · Semiconductors · Enterprise · AI
AMD's next-generation Versal Premium Gen 2 adaptive SoCs will use LPDDR5X memory-on-package instead of HBM, targeting the same compact form factor with a projected 15+ year lifecycle. The pivot is driven by HBM supply shortages and long lead times. LPDDR5X offers lower bandwidth than HBM but sufficient for many edge and embedded workloads, and the memory-on-package approach maintains the small footprint. The Gen 2 devices retain the Versal architecture's AI engines, DSP blocks, and programmable logic, with sampling expected in 2027.
Technical significance
HBM supply constraints are forcing architectural compromises even at the high end of the adaptive SoC market. LPDDR5X-on-package trades peak bandwidth for supply-chain resilience and lifecycle predictability — critical for defense, aerospace, and industrial customers with 15+ year programs. This signals that memory packaging, not just compute density, is becoming a primary design constraint for AI acceleration at the edge. Expect more vendors to adopt multi-source memory strategies.